Semiconductor device and method for manufacturing semiconductor device

ABSTRACT

A semiconductor device of the present invention includes: a III-V nitride semiconductor layer including a channel region in which carriers travel; a concave portion provided in an upper portion of the channel region in the III-V nitride semiconductor layer; and a Schottky electrode consisting of a conductive material forming a Schottky junction with the semiconductor layer, and formed on a semiconductor layer, which spreads over the concave portion and peripheral portions of the concave portion, on the III-V nitride semiconductor layer. A dimension of the concave portion in a depth direction is set so that a portion of the Schottky electrode provided in the concave portion can adjust a quantity of the carriers traveling in the channel region.

CROSS-REFERENCE TO RELATED APPLICATIONS

All the matters disclosed in the claims, the specification, and thedrawings of Japanese Patent Application No. 2003-432886 filed on Dec.26, 2003 are incorporated herein by reference.

BACKGROUND OF THE INVENTION

The present invention relates to a semiconductor device using a III-Vnitride semiconductor and a method for manufacturing the semiconductordevice. More specifically, the present invention relates to asemiconductor device having a Schottky electrode formed on asemiconductor layer consisting of a III-V nitride semiconductor, and amethod for manufacturing the semiconductor device.

Conventionally, a III-V nitride semiconductor such as gallium nitride(GaN) has been widely used as a material for an active layer of anoptical device since it has a direct transition energy band structureand a wide band gap. Recently, since the III-V nitride semiconductor ischaracteristically high in breakdown field intensity and high inelectron saturation velocity, use of this III-V nitride semiconductor toa high frequency and high power electron device has been considered.

Among electron devices using the nitride semiconductor, development of aheterojunction field effect transistor (hereinafter, “HFET”), inparticular has been considered.

Examples of the HFET device using the III-V nitride semiconductorinclude an HFET device constituted so that a GaN layer and an aluminumgallium nitride (AlGaN) layer are formed on a semi-insulating substrateby epitaxial growth, and so that a gate electrode that is a Schottkyelectrode and a source electrode and a drain electrode that are ohmicelectrodes are provided on the AlGaN layer. In this HFET device, atwo-dimensional electron gas layer (hereinafter, “2DEG layer”) is formednear an interface of the GaN layer with the AlGaN layer and the 2DEGlayer is employed as a high electron mobility channel region.

Nevertheless, because of presence of a high density trap level on asurface of the III-V nitride semiconductor, carries are captured andemitted in traps on the surface of the AlGaN layer, with the result thata phenomenon of deterioration in high frequency characteristics orso-called frequency dispersion occurs.

To suppress this frequency dispersion, there are known a method forreducing a trap density on the surface of the AlGaN layer by covering aregion between the gate electrode and the source electrode and a regionbetween the gate electrode and the drain electrode on the surface of theAlGaN layer with a surface protection film consisting of silicon nitride(SiN), and a method for providing a surface protection film consistingof a low concentration n type GaN on the AlGaN layer, and forming thegate electrode interposing the surface protection film (see, forexample, Japanese Patent Application Laid-Open No. 2002-359256).

If the surface protection film consisting of SiN is used, the trapdensity on the surface of the AlGaN layer can be reduced in lateralportions of the gate electrode. However, in a fringe region that is alower side end of the gate electrode, surface charge influences thechannel region, with the result that the frequency dispersion cannot besufficiently suppressed. If the surface protection film consisting oflow concentration n type GaN is used, a distance between the gateelectrode and the channel region is increased by a thickness of thesurface protection film, with the result that a mutual conductance (gm)of the HFET device is reduced.

Meanwhile, as the HFET device using a gallium arsenide (GaAs) basedmaterial, there is known an HFET device having a so-called spike-gatestructure in which a convex portion having a V-shaped cross section isprovided in a lower portion of the gate electrode so as to decrease theinfluence of the surface traps (see, for example, Japanese PatentApplication Laid-Open No. 2001-102354, and H. Furukawa and six others,“High power-added efficiency and low distortion GaAs power NET employingspike-gate structure”, Solid-State Electronics, Elsevier Ltd., 1997,Volume 41, Issue 10, pp. 1599-1604).

FIG. 10 is a cross-sectional block diagram that depicts a conventionalGaAs based HFET device including the spike-gate. As shown in FIG. 10, ann type GaAs layer 102 and high concentration n type GaAs layer 103 areformed on a substrate 101 in this order. A concave portion 102 a havinga V-shaped cross section is provided in an upper portion of the n typeGaAs layer 102, and the high concentration n type GaAs layer 103 isformed into a recess so as to open the concave portion 102 a andsurroundings of the concave portion 102 a. In the region formed in therecess of the high concentration n type GaAs layer 103 on the n typeGaAs layer 102, a gate electrode 104 is provided to be filled into theconcave portion 102 a. In addition, a source electrode 105 and a drainelectrode 106 are provided on the high concentration n type GaAs layer103.

In the HFET device shown in FIG. 10, since the gate electrode 104 isprovided to be filled into the concave portion 102 a, a convex portionhaving a V-shaped cross section is provided on a bottom side of the gateelectrode 104 (that is, on a bottom of the concave portion 102 a). Adepth of the concave portion 102 a is set so that the convex portionprovided on the bottom side of the gate electrode 104 substantiallyfunctions as a gate.

By doing so, as compared with an ordinary recess structure, a gapbetween an upper surface of the n type GaAs layer 102 and the channelregion can be set wide. It is, therefore, possible to decrease theinfluence of the traps on the upper surface of the n type GaAs layer 102on the channel region, and suppress the frequency dispersion resultingfrom the traps on the surface of the n type GaAs layer 102.

In order to form the gate electrode 104 having such a structure, theconcave portion 102 a is formed using an anisotropic etchant havingdifferent etch rates according to plane orientations. Specifically, theconcave portion 102 a inclined at about 54.7 degrees with respect to theupper surface of the n type GaAs layer 102 is formed by wet etchingusing an etchant having an etch rate on a (100) plane of GaAs higherthan an etch rate on a (111) plane. The concave portion 102 a is formedinto a recess in a [100] direction of the crystal plane, having a (111)plane of GaAs as an inclined surface, and having a V-shaped crosssection.

However, if the spike-gate structure of the conventional GaAs based HFETdevice is applied to the HFET device using the III-V nitridesemiconductor, it is difficult to form a minute concave portion in theupper portion of the III-V nitride semiconductor layer. This is becausecrystals of the III-V nitride semiconductor are chemically stable and noorientation dependent anisotropic wet etching appropriate for this HFETdevice is present.

As can be seen, the HFET device using the III-V nitride semiconductorhas the following disadvantages. Since it is difficult to form the gateelectrode having the concave portion on the bottom side of thespike-gate or the like, the influence of the traps on the upper surfaceof the III-V nitride semiconductor layer on the channel region cannot besufficiently decreased. Hence, the frequency dispersion inhibitsobtaining good high frequency characteristics.

SUMMARY OF THE INVENTION

In view of the above-mentioned conventional disadvantages, the presentinvention has been devised for the purpose of realizing a semiconductordevice using a III-V nitride semiconductor capable of ensuringsuppressing frequency dispersion resulting from surface traps on asurface of a III-V nitride semiconductor layer.

To attain the object, the present invention provides a constitution inwhich a concave portion is formed in a region, in which a gate electrodeis formed, in a III-V nitride semiconductor layer by dry etching.

Specifically, according to a first aspect of the present invention,there is provided a semiconductor device, comprising: a III-V nitridesemiconductor layer including a channel region in which carriers travel;a concave portion provided in an upper portion of the channel region inthe III-V nitride semiconductor layer; and a Schottky electrodeconsisting of a conductive material forming a Schottky junction with thesemiconductor layer, and formed on a semiconductor layer, which spreadsover the concave portion and peripheral portions of the concave portion,on the III-V nitride semiconductor layer, wherein a dimension of theconcave portion in a depth direction is set so that a portion of theSchottky electrode provided in the concave portion can adjust a quantityof the carriers traveling in the channel region.

In the semiconductor device of the present invention, the portion of theSchottky electrode formed in the concave portion can be used as asubstantial gate electrode of a transistor. Due to this, the Schottkyelectrode can be formed so that the upper surface of the III-V nitridesemiconductor layer is away from the channel region by the depth of theconcave portion. In addition, it is possible to decrease the influenceof traps present on the upper surface of the III-V nitride semiconductorlayer, on the channel region. It is, therefore, possible to ensuresuppressing frequency dispersion. Besides, since the portion of theSchottky electrode provided in the concave portion is used as thesubstantial gate electrode, a substantial gate length is substantiallyequal to a width of a bottom of the concave portion. Therefore, the gatelength is reduced and the semiconductor device can operate at high rate.

It is preferable that the semiconductor device of the present inventionfurther comprises a film provided between the III-V nitridesemiconductor layer and the Schottky electrode so as to open an upperside of the concave portion.

By so constituting, since the Schottky electrode is provided on theIII-V nitride semiconductor layer interposing the film, a trap densityon the upper surface of the III-V nitride semiconductor layer can bereduced. It is, therefore, possible to obtain the semiconductor devicethat can further suppress the frequency dispersion and that has goodhigh frequency characteristics.

In the semiconductor device of the present invention, it is preferablethat the concave portion is provided so that an opening dimension issmaller from an upper surface side of the III-V nitride semiconductorlayer toward a bottom side of the III-V nitride semiconductor layer.

By so constituting, the bottom of the concave portion can be furthermade small, and the substantial gate length can be, therefore, furtherreduced.

In the semiconductor device of the present invention, it is preferablethat the concave portion is provided so that the opening dimension islinearly changed.

In this case, it is preferable that the semiconductor device furthercomprises a film consisting of a crystalline material and providedbetween the III-V nitride semiconductor layer and the Schottky electrodeso as to open an upper side of the concave portion.

In the semiconductor device of the present invention, it is preferablethat the concave portion is provided so that the opening dimension isnonlinearly changed.

In this case, it is preferable that the semiconductor device furthercomprises a film consisting of an amorphous material and providedbetween the III-V nitride semiconductor layer and the Schottky electrodeso as to open an upper side of the concave portion.

According to a second aspect of the present invention, there is provideda method for manufacturing a semiconductor device comprising steps of:sequentially forming a III-V nitride semiconductor layer and a concaveportion transfer film on a substrate; forming a first concave portion inthe concave portion transfer film; and etching the concave portiontransfer film by a predetermined depth using etching capable of etchingthe III-V nitride semiconductor layer and the concave portion transferfilm, and thereby forming a second concave portion that has anequivalent shape to a shape of the first concave portion, below thefirst concave portion in the III-V nitride semiconductor layer.

According to the method for manufacturing the semiconductor device ofthe present invention, it is possible to ensure that the second concaveportion having a desired depth is formed in the region in which the gateelectrode is formed on the III-V nitride semiconductor layer based onthe shape of the first concave portion formed in the concave portiontransfer film. Accordingly, by forming the Schottky electrode to befilled into the second concave portion, the portion of the Schottkyelectrode filled into the second concave portion can be used as asubstantial gate electrode. It is, therefore, possible to ensureobtaining the semiconductor device that can decrease the influence oftraps present on the upper surface of the III-V nitride semiconductorlayer, on the channel region, and that can suppress frequencydispersion.

In the method for manufacturing the semiconductor device of the presentinvention, it is preferable that the concave portion transfer filmconsists of a crystalline material, and that the step of forming thefirst concave portion includes steps of: forming a first mask patternthat includes an opening portion in a region in which the first concaveportion is formed, on the concave portion transfer film; and removing apart of the concave portion transfer film which part is exposed to theopening portion of the first mask pattern by a predetermined depth byanisotropic etching.

By doing so, the first concave portion can be etched into a desiredshape according to a crystal structure of the concave portion transferfilm by orientation dependent anisotropic etching. The second concaveportion can be, therefore, formed while controlling the shape of theconcave portion according to the shape of the first concave portion.

In the method for manufacturing the semiconductor device of the presentinvention, as the crystalline material, one of gallium arsenide,silicon, silicon carbide, gallium phosphide, and diamond can be used.

If one of these materials is used, the first concave portion is formedto have the V-shaped cross section by the orientation dependentanisotropic etching. The second concave portion having the V-shapedcross section can be, therefore, formed.

In the method for manufacturing the semiconductor device of the presentinvention, it is preferable that the concave portion transfer filmcontains impurities consisting of a group IV element or a group Velement.

By doing so, even if atoms that constitute the III-V nitridesemiconductor layer are inadvertently diffused into the concave portiontransfer film, the group IV impurities or group V impurities cancompensate for the reduction in the resistance of the III-V nitridesemiconductor layer. Accordingly, even if the concave portion transferfilm consisting of silicon is used, the concave portion transfer filmcan be formed so as not to reduce the resistance of the III-V nitridesemiconductor layer.

It is preferable that the method for manufacturing the semiconductordevice of the present invention comprises a step, after the step offorming the second concave portion, of conducting a heat treatment tothe III-V nitride semiconductor layer under conditions of a temperatureof 300° C. or more and 1500° C. or less.

By doing so, the crystal defects generated on the III-V nitridesemiconductor layer by the etching for forming the second concaveportion can be eliminated by the heat treatment. The reliability of thesemiconductor device can be, therefore, improved.

In the method for manufacturing the semiconductor device of the presentinvention, it is preferable that at the step of forming the secondconcave portion, an etching depth of the etching on the concave portiontransfer film is set so that the concave portion transfer film remainson an upper surface of the III-V nitride semiconductor layer, and thatthe method further comprises steps of: forming a second mask patternthat covers the second concave portion and peripheral portions of thesecond concave portion, on the concave portion transfer film after thestep of forming the second concave portion; and forming a film thatcovers the peripheral portions of the second concave portion from theconcave portion transfer film by etching using the second mask pattern.

By doing so, the film is formed on the upper surface of the III-Vnitride semiconductor layer. Due to this, by forming the Schottkyelectrode on the film to be filled into the second concave portion, thetrap density in both side portions of the Schottky electrode on theupper surface of the III-V nitride semiconductor layer can be reduced.It is, therefore, possible to further ensure suppressing the frequencydispersion.

It is preferable that the method for manufacturing the semiconductordevice of the present invention further comprises a step, between thestep of forming the second concave portion and the step of forming thefilm, of conducting a heat treatment to the III-V nitride semiconductorlayer at a temperature of 300° C. or more and 1500° C. or less.

By doing so, the heat treatment can be conducted in a state in which thesurface of the III-V nitride semiconductor layer is covered with theconcave portion transfer film. The crystal defects of the III-V nitridesemiconductor layer can be, therefore, eliminated while suppressing thethermal oxidation of the surface of the III-V nitride semiconductorlayer.

In the method for manufacturing the semiconductor device of the presentinvention, as the crystalline material that constitutes the concaveportion transfer film, one of silicon, silicon carbide, galliumphosphide, and diamond can be used.

If one of these materials is used, since the concave portion transferfilm is constituted by a high heat resistant material, at the heattreatment step of eliminating the crystal defects of the III-V nitridesemiconductor layer, it is possible to ensure suppressing degeneration,transformation, or the like of the III-V nitride semiconductor layer dueto the heat on the surface thereof.

In the method for manufacturing the semiconductor device of the presentinvention, it is preferable that the concave portion transfer filmcontains impurities consisting of a group IV element or a group Velement.

If the concave portion is transferred onto the III-V nitridesemiconductor layer by the dry etching, group III gallium (Ga) mixedinto the concave portion transfer film during crystal growth on theconcave portion transfer film is diffused into the concave portiontransfer film to thereby reduce the specific resistance of the concaveportion transfer film when the concave portion transfer film is left andused as a surface film. Due to this, the portion into which gallium isdiffused acts as a leak current path from the gate electrode. However,by thus adding the group IV element or the group V element to theconcave portion transfer film, the group III gallium is compensated(canceled) and the resistance of the concave portion transfer film isincreased. The gate leak current can be thereby suppressed.

It is preferable that the method for manufacturing the semiconductordevice of the present invention further comprises a step, after the stepof forming the second concave portion, of oxidizing, nitriding, oroxynitriding a surface of the concave portion transfer film.

By doing so, the film formed from the concave portion transfer film isin a state in which an oxide film, a nitride film, or an oxynitride filmis formed on an upper portion of the film and the film can be formed tohave high resistance. It is, therefore, possible to obtain thesemiconductor device which can suppress the leak current from the gateelectrode.

In the method for manufacturing the semiconductor device of the presentinvention, it is preferable that the concave portion transfer filmconsists of an amorphous material or a polycrystalline material, andthat the step of forming the first concave portion includes steps of:forming a first mask pattern that includes an opening portion in aregion in which the first concave portion is formed, on the concaveportion transfer film; and removing a part of the concave portiontransfer film which part is exposed to the opening portion of the firstmask pattern by a predetermined depth by isotropic etching.

By doing so, the first concave portion can be formed so that the openingdimension is nonlinearly smaller toward the depth direction by theisotropic etching.

In the method for manufacturing the semiconductor device of the presentinvention, as the amorphous material, one of amorphous silicon, siliconoxide, silicon nitride, silicon carbide, and a III-V nitridesemiconductor can be used.

In the method for manufacturing the semiconductor device of the presentinvention, as the polycrystalline material, one of silicon, siliconcarbide, gallium phosphide, diamond, and a III-V nitride semiconductorcan be used.

In the method for manufacturing the semiconductor device of the presentinvention, it is preferable that at the step of forming the secondconcave portion, an etching depth of the etching on the concave portiontransfer film is set so that the concave portion transfer film remainson an upper surface of the III-V nitride semiconductor layer, and thatthe method further comprises steps of: forming a second mask patternthat covers the second concave portion and peripheral portions of thesecond concave portion, on the concave portion transfer film after thestep of forming the second concave portion; and forming a film thatcovers the peripheral portions of the second concave portion from theconcave portion transfer film by etching using the second mask pattern.

It is preferable that the method for manufacturing the semiconductordevice of the present invention further comprises a step, between thestep of forming the second concave portion and the step of forming thefilm, of conducting a heat treatment to the III-V nitride semiconductorlayer at a temperature of 300° C. or more and 1500° C. or less.

In the method for manufacturing the semiconductor device of the presentinvention, it is preferable that the concave portion transfer filmcontains impurities consisting of a group IV element or a group Velement.

It is preferable that the method for manufacturing the semiconductordevice of the present invention further comprises a step, after the stepof forming the second concave portion, of oxidizing, nitriding, oroxynitriding a surface of the concave portion transfer film.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A is a cross-sectional block diagram of a III-V nitridesemiconductor device in the first embodiment of the present invention,FIG. 1B is a cross-sectional block diagram of a III-V nitridesemiconductor device in the first modification of the first embodimentof the present invention, and FIG. 1C is a cross-sectional block diagramof a III-V nitride semiconductor device in the second modification ofthe first embodiment of the present invention;

FIG. 2A is a cross-sectional block diagram of a III-V nitridesemiconductor device in the second embodiment of the present invention,and FIG. 2B is a cross-sectional block diagram of a III-V nitridesemiconductor device in one modification of the second embodiment of thepresent invention;

FIGS. 3A to 3D are cross-sectional block diagrams that depict a methodfor manufacturing the III-V nitride semiconductor device in the secondembodiment of the present invention in order of steps;

FIG. 4 is a cross-sectional block diagram of a III-V nitridesemiconductor device in the third embodiment of the present invention;

FIGS. 5A to 5D are cross-sectional block diagrams that depict a methodfor manufacturing the III-V nitride semiconductor device in the thirdembodiment of the present invention in order of steps;

FIG. 6 is cross-sectional block diagram of a III-V nitride semiconductordevice in the fourth embodiment of the present invention;

FIGS. 7A to 7D are cross-sectional block diagrams that depict a methodfor manufacturing the III-V nitride semiconductor device in the fourthembodiment of the present invention in order of steps;

FIG. 8 is cross-sectional block diagram of a III-V nitride semiconductordevice in the fifth embodiment of the present invention;

FIGS. 9A to 9D are cross-sectional block diagrams that depict a methodfor manufacturing the III-V nitride semiconductor device in the fifthembodiment of the present invention in order of steps;

FIG. 10 is cross-sectional block diagram of a conventional GaAs-basedHFET device.

FIG. 11A to 11C are cross-sectional block diagrams of a III-V nitridesemiconductor device in another modification of the first embodiment ofthe present invention.

FIG. 12A to FIG. 12B are cross-sectional block diagrams of a III-Vnitride semiconductor device in another modification of the secondembodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION Embodiment 1

A III-V nitride semiconductor device in the first embodiment of thepresent invention will be described with reference to the drawings. Inthe present specification, the III-V nitride semiconductor is a hybridsemiconductor including one of or two or more of boron nitride (BN),aluminum nitride (AlN), gallium nitride (GaN), and indium nitride (InN),and represented by a general formula of B_(x)Al_(y)Ga_(z)In_(1-x-y)N(where 0≦x≦1, 0≦y≦1, and ≦0z≦z≦1).

FIG. 1A is a cross-sectional block diagram of the III-V nitridesemiconductor device in the first embodiment of the present invention.As shown in FIG. 1A, the III-V nitride semiconductor device isconstituted so that, for example, a buffer layer 12 having a thicknessof about 10 nm to 200 nm and consisting of aluminum nitride (AlN), achannel layer 13 having a thickness of about 2 μm to 3 μm and consistingof undoped gallium nitride (GaN), and a carrier supply layer 14 having athickness of about 20 nm to 30 nm and consisting of n type aluminumgallium nitride (AlGaN) are formed on a substrate 11 consisting ofsilicon carbide (SiC) in this order. The thicknesses of the buffer layer12, the channel layer 13, and the carrier supply layer 14 are given asone example. The thickness of the channel layer 13 may be set so thatchannel layer 13 has good crystallinity and may be, for example, atleast about 1 μm.

A concave portion 14 a is provided in an upper portion of the carriersupply layer 14, and a gate electrode 15 which consists of a metallicmaterial and in which a Schottky junction with the carrier supply layer14 is formed is provided on the carrier supply layer 14 to be filledinto the concave portion 14 a. A depth of the concave portion 14 a ispreferably 20 nm or less, more preferably about 10 nm to 15 nm if thethickness of the carrier supply layer 14 is, for example, 25 nm. In thiscase, the HFET device according to this embodiment can operate at afrequency of 2 GHz.

A source electrode 16 and a drain electrode 17 each consisting of ametallic material and forming an ohmic contact with the carrier supplylayer 14 are provided laterally of the gate electrode 15, respectively,on the carrier supply layer 14 at a predetermined distance between thesource electrode 16 and the drain electrode 17. As the gate electrode15, a multilayer film consisting of nickel (Ni) and gold (Au) or amonolayer film consisting of palladium (Pd) or palladium silicon (PdSi)can be used. As the source electrode 16 or the drain electrode 17, amultilayer film consisting of titanium (Ti) and aluminum (Al) can beused.

The III-V nitride semiconductor device in the first embodiment functionsas an HFET having a 2DEG layer formed near an interface of the channellayer 13 with the carrier supply layer 14 by a heterojunction betweenthe channel layer 13 and the carrier supply layer 14. By applying apredetermined operating voltage Vds to the source electrode 16 and thedrain electrode 17, electrons in quantities corresponding to a potentialof the gate electrode 15 travel on the 2DEG layer.

In the III-V nitride semiconductor device in the first embodiment, byappropriately adjusting the depth of the concave portion 14 a, a convexportion provided on a bottom side of the gate electrode 15, i.e., aportion of the gate electrode 15 filled into the concave portion 14 asubstantially functions as a gate electrode.

A first threshold voltage Vth1 is proportional to a distance from alower end of the concave portion 14 a to an upper surface of the channellayer 13, and a second threshold voltage Vth2 is proportional to athickness of the carrier supply layer 14. By adjusting the depth of theconcave portion 14 a according to the thickness of the carrier supplylayer 14, therefore, the threshold voltages Vth1 and Vth2 can be set atappropriate values.

By thus constituting the III-V nitride semiconductor device, even if adistance from the upper surface of the carrier supply layer 14 to thechannel region (2DEG layer) is set large, the quantity of carrierstraveling in the channel region can be adjusted using the portion of thegate electrode 15 formed in the concave portion 14 a. Accordingly, aslong as the distance from the bottom of the concave portion 14 a to thechannel region is equal to the distance from the upper surface of theflat carrier supply layer to the channel region, it is possible todecrease the influence of traps between the upper surface of the carriersupply layer 14 and the bottom of the gate electrode 15 on the channelregion by as much as the depth of the concave portion 14 a, as comparedwith the conventional configuration in which the gate electrode isprovided on the upper surface of the flat carrier supply layer.Therefore, frequency dispersion can be suppressed and high frequencycharacteristics can be improved.

In the III-V nitride semiconductor device in the first embodiment, theconcave portion 14 a can be formed by performing dry etching on thecarrier supply layer 14, the surface of which is formed flat byepitaxial growth, using a mask pattern provided to open a region inwhich the concave portion 14 a is formed by an etching gas consisting ofchlorine (Cl₂) and sulfur hexafluoride (SF₆). By using this etching gas,the carrier supply layer 14 consisting of AlGaN can be etched at an etchrate of about 0.1 nm to 100 nm per minute, and it is possible to ensureforming the concave portion 14 a while controlling the depth of theconcave portion 14 a.

Modification 1 of Embodiment 1

FIG. 1B is a cross-sectional block diagram of a III-V nitridesemiconductor device in the first modification of the first embodimentof the present invention. As shown in FIG. 1B, the III-V nitridesemiconductor device in the first modification is constituted so that aprotection film 18 having a thickness of about 100 nm to 200 nm andconsisting of silicon oxide or silicon nitride is provided in a regionbetween the concave portion 14 a and each of the source electrode 16 andthe drain electrode 17 on the upper surface of the carrier supply layer14.

According to the first modification of the first embodiment, since theprotection film 18 is provided on the upper surface of the carriersupply layer 14, a trap density in both side portions of the gateelectrode 15 on the upper surface of the carrier supply layer 14 can bereduced. It is, therefore, possible to further ensure suppressing thefrequency dispersion resulting from the traps on the upper surface ofthe carrier supply layer 14, as compared with the first embodiment.

In the configuration shown in FIG. 1B, a material for the protectionfilm 18 is not limited to silicon oxide or silicon nitride but may bethe other insulating material, a single crystal silicon, amorphoussilicon, gallium arsenide (GaAs), or the like.

Modification 2 of Embodiment 1

FIG. 1C is a cross-sectional block diagram of a III-V nitridesemiconductor device in the second modification of the first embodimentof the present invention. As shown in FIG. 1C, the III-V nitridesemiconductor device in the second modification is constituted so that agate electrode 15A formed in the concave portion 14 a, which is providedon the upper surface of the carrier supply layer 14, and serving as aSchottky electrode is provided not to be filled into the concave portion14 a but to extend along a bottom and a wall surface of the concaveportion 14 a and peripheral portions of the concave portion 14 a. Sincethe gate electrode 15A is not filled into the concave portion 14 a, anamount of a material used for the gate electrode 15A can be reduced anda throughput of a step of forming the gate electrode 15A can beimproved.

Embodiment 2

A III-V nitride semiconductor device in the second embodiment of thepresent invention will be described hereinafter with reference to thedrawings.

FIG. 2A is a cross-sectional block diagram of the III-V nitridesemiconductor device in the second embodiment of the present invention.In FIG. 2A, same components as those shown in FIGS. 1A to 1C are denotedby the same reference symbols, respectively, and will not be repeatedlydescribed herein.

As shown in FIG. 2A, the III-V nitride semiconductor device in thesecond embodiment of the present invention is constituted so that abuffer layer 12 consisting of AlN, a channel layer 13 consisting ofundoped GaN, and a carrier supply layer 14 consisting of AlGaN areformed on a substrate 11 consisting of SiC in this order, and so that aconcave portion 14 b having a V-shaped cross section is formed in anupper portion of the carrier supply layer 14.

A gate electrode 15 is provided on the carrier supply layer 14 to befilled into the concave portion 14 a. A source electrode 16 and a drainelectrode 17 are provided laterally of the gate electrode 15,respectively, on the carrier supply layer 14 at a predetermined distancebetween the source electrode 16 and the drain electrode 17. Similarly tothe first embodiment, a depth of the concave portion 14 b is set so thata portion of the gate electrode 15 provided in the concave portion 14 bsubstantially functions as a gate electrode.

According to the III-V nitride semiconductor device in the secondembodiment, similarly to the III-V nitride semiconductor device in thefirst embodiment, the portion of the gate electrode 15 provided in theconcave portion 14 b can be used as the substantial gate electrode. Dueto this, it is possible to decrease the influence of traps present onthe upper surface of the carrier supply layer 14, on the channel regionby as much as the depth of the concave portion 14 b. It is, therefore,possible to ensure suppressing frequency dispersion resulting from thetraps on the upper surface of the carrier supply layer 14.

Furthermore, the concave portion 14 b is formed to have the V-shapedcross-section, that is, formed so that an opening dimension is linearlysmaller from the upper surface side of the carrier supply layer 14toward the depth direction. Due to this, an effective gate length of thegate electrode 15 can be set far smaller than that of the gate electrode15 in the first embodiment, while using a normally used patternformation technique. The III-V nitride semiconductor device in thesecond embodiment can, therefore, operate at high rate.

Modification of Embodiment 2

FIG. 2B is a cross-sectional block diagram of a III-V nitridesemiconductor device in one modification of the second embodiment of thepresent invention. As shown in FIG. 2B, the III-V nitride semiconductordevice in this modification is constituted so that a gate electrode 15Aformed in the concave portion 14 b, which has the V-shaped cross sectionand provided on the upper surface of the carrier supply layer 14, andserving as a Schottky electrode is provided not to be filled into theconcave portion 14 b but to extend along an inclined surface of theconcave portion 14 a and peripheral portions of the concave portion 14b. Since the gate electrode 15A is not filled into the concave portion14 b, an amount of a material used for the gate electrode 15A can bereduced and a throughput of a step of forming the gate electrode 15A canbe improved.

A method for manufacturing the III-V nitride semiconductor device in thesecond embodiment of the present invention will now be described withreference to the drawings.

FIGS. 3A to 3D are cross-sectional block diagrams that depict the methodfor manufacturing the III-V nitride semiconductor device in the secondembodiment of the present invention in order of steps.

As shown in FIG. 3A, the buffer layer 12 consisting of AlN, the channellayer 13 consisting of undoped GaN, the carrier supply layer 14consisting of n type AlGaN, a so-called low temperature buffer layer 21having a thickness of 15 nm to 20 nm and consisting of gallium arsenide(GaAs), and a concave portion transfer film 22 having GaAs subjected tocrystal growth so that a plane orientation is a (100) plane are formedon the substrate 11 consisting of SiC in this order by growth usingmetal organic chemical vapor deposition (MOCVD) or molecular beamepitaxy (MBE). As a material for the low temperature buffer layer 21,GaAs grown into an amorphous state at a low temperature is used, wherebycrystal lattice mismatching between the carrier supply layer 14 and theconcave portion transfer film 22 can be relaxed. The material for thelow temperature buffer layer 21 is not limited to GaAs grown at a lowtemperature but may be an arbitrary material which can relax the latticemismatching between the carrier supply layer 14 and the concave portiontransfer film 22.

A concave portion formation mask pattern 23 including an opening portion23 a a longitudinal direction of which is a [110] orientation of thecrystal lattice of GaAs of the concave portion transfer film 22 andhaving an opening width of about 100 nm is formed on the concave portiontransfer film 22 by lithography.

As shown in FIG. 3B, a transfer concave portion 22 a is formed in theconcave portion transfer film 22 exposed to the opening portion 23 a ofthe mask pattern 23 by wet etching using a solution mixture of sulfuricacid (H₂SO₄) and hydrogen peroxide (H₂O₂) as an etchant. As the etchant,the solution mixture having a volume ratio of, for example,H₂SO₄:H₂O₂:H₂O=8:1:1 can be used.

The etchant consisting of H₂SO₄ and H₂O₂ exhibits crystal anisotropyrelative to gallium arsenide crystals, and an etch rate of the etchanton the (111) plane is far lower than an etch rate on the (100) plane.Therefore, the transfer concave portion 22 a is formed to have the (111)plane as an inclined surface and have a recess cross section in the[100] orientation, i.e., a V-shaped cross section.

As shown in FIG. 3C, after removing the mask pattern 23, an entiresurface of the concave transfer film 22 is etched by a predetermineddepth by dry etching using a gas mixture of chlorine (Cl₂) and sulfurhexafluoride (SF₆) as an etching gas.

Conditions for the dry etching on the concave transfer film 22 are asfollows. A flow rate of Cl₂ is about 10 ml/min (in a standardcondition), a flow rate of SF₆ is about 5 ml/min (in a standardcondition), a reaction chamber pressure is about 4 Pa, a plasma outputis about 600 W, and a substrate voltage is about 30 W. In the gasmixture used for the dry etching, boron trichloride (BCl₃) may be usedin place of Cl₂.

The etching gas consisting of Cl₂ and SF₆ can etch GaAs and AlGaN.Therefore, by etching the concave transfer film 22 from the uppersurface side, the low temperature buffer layer 21 and the carrier supplylayer 14 are sequentially etched from the upper surface side below thetransfer concave portion 22 a, and the concave portion 14 b having anequivalent V-shaped cross section to that of the transfer concaveportion 22 a is formed in the carrier supply layer 14. At this time, thedepth of the concave portion 14 b can be appropriately adjusted byadjusting an etching depth of the etching on the concave transfer film22.

The concave portion 14 b having the V-shaped cross section can besimilarly formed in the carrier supply layer 14 even by an anisotropicphysical method such as ion milling using argon (Ar) in place of the dryetching on the concave portion transfer film 22.

As shown in FIG. 3D, after sequentially removing the concave portiontransfer film 22 and the low temperature buffer layer 21 by the wetetching, the source electrode 16 and the drain electrode 17 are formedlaterally of the concave portion 14 b on the carrier supply layer 14using a metallic material which can form an ohmic contact with thecarrier supply layer 14, with the distance kept between the sourceelectrode 16 and the drain electrode 17, furthermore, the ohmic contactis formed through a heat treatment step. Thereafter, the gate electrode15 is formed to be filled into the concave portion 14 b using a metallicmaterial that can form a Schottky junction with the carrier supply layer14.

Through these steps, the III-V nitride semiconductor device in thesecond embodiment can be obtained.

According to the method for manufacturing the III-V nitridesemiconductor device in the second embodiment, by forming the transferconcave portion 22 a in the concave portion transfer film 22 consistingof GaAs and then dry-etching the concave portion transfer film 22, theconcave portion 14 b having the equivalent cross section to that of thetransfer concave portion 22 a can be formed in the carrier supply layer14:

Further, during the etching for forming the concave portion 14 b, anetch selectivity of the material (AlGaN) for the carrier supply layer 14to the material (GaAs) for the concave portion transfer film 22 iscontrolled. It is thereby possible to ensure forming the concave portion14 b while controlling the shape of the concave portion 14 b based onthe shape of the transfer concave portion 22 a. It is particularlypreferable to set the etch selectivity at 1 or more so as to improve apointedness of the concave portion 14 b.

In the method for manufacturing the III-V nitride semiconductor devicein the second embodiment, annealing can be performed under conditions ofa temperature of 300° C. or more and 1500° C. or less after the dryetching step of forming the concave portion 14 b and at least before theformation of the gate electrode 15, the source electrode 16, and thedrain electrode 17. If so, crystal defects generated in the carriersupply layer 14 due to a damage of the dry etching can be eliminated.Reliability of the III-V nitride semiconductor device can be therebyimproved.

In the method for manufacturing the III-V nitride semiconductor devicein the second embodiment, the material for the concave portion transferfilm 22 is not limited to GaAs but may be an arbitrary material withwhich the transfer concave portion 22 a having the V-shaped crosssection can be formed based on crystal anisotropy. For example,single-crystal silicon, SiC, gallium phosphide (GaP), or diamond can beused as the material for the concave portion transfer film 22. By usingone of these materials, it is possible to ensure forming the concaveportion 14 b to have the V-shaped cross section by the crystalanisotropic wet etching.

It is more preferable that the material for the concave portion transferfilm 22 is one of silicon, SiC, GaP, and diamond. If so, the concaveportion transfer film 22 is constituted by the high heat resistantmaterial. Due to this, the annealing performed to eliminate the crystaldefects can be executed before the step of removing the concave portiontransfer film 22. It is, therefore, possible to anneal the carriersupply layer 14 while the carrier supply layer 14 is hardly exposed.

Examples of the etchant for forming the transfer concave portion 22 ahaving the V-shaped cross section if the material other than GaAs isused for the concave portion transfer film 22, will be shown accordingto the materials as follows. If silicon (Si) is the material for theconcave portion transfer film 22, the transfer concave portion 22 a canbe formed by anisotropic wet etching using, as the etchant, a solutionmixture of potassium hydroxide (KOH) and tetra-methyl ammonium hydroxide(TMAH) or by anisotropic dry etching using, as the etchant, chlorine(Cl₂) gas. If gallium phosphide (GaP) is the material for the concaveportion transfer film 22, the transfer concave portion 22 a can beformed by anisotropic wet etching using, as the etchant, a solutionmixture of hydrogen bromide (HBr), hydrogen peroxide (H₂O₂), and water(H₂O) at a volume ratio of 1:1:3 or by anisotropic dry etching using anetchant mainly containing chlorine (Cl₂) gas. If silicon carbide (SiC)is the material for the concave portion transfer film 22, the transferconcave portion 22 a can be formed by dry etching using, as the etchant,a gas mixture of chlorine (Cl₂) and sulfur hexafluoride (SF₆). Ifdiamond (C) is the material for the concave portion transfer film 22,the transfer concave portion 22 a can be formed by anisotropic dryetching using, as the etchant, a hydrogen chloride (HCl) gas.

It is noted that, in the first and second embodiments, the carriersupply layer 14 may have a layered structure composed of a first carriersupply layer 140 made of Al_(u)Ga_(1-u)N(0≦u≦1) and a second carriersupply layer 141 made of Al_(v)Ga_(1-v)N (0≦v≦1, u≠v), as shown in FIG.11A to FIG. 11C and FIG. 12A to FIG. 12B. With this structure, the firstcarrier supply layer 140 and the second supply layer 141 are differentfrom each other in composition, resulting in difference from each otherin etch rate in dry etching. Thus, the second carrier supply layer 141is selectively etched out of the first carrier supply layer 140 and thesecond carrier supply layer 141.

Embodiment 3

A III-V nitride semiconductor device in the third embodiment of thepresent invention will be described with reference to the drawings.

FIG. 4 is a cross-sectional block diagram of the III-V nitridesemiconductor device in the third embodiment of the present invention.In FIG. 4, same components as those shown in FIG. 2A are denoted by thesame reference symbols, respectively, and will not be repeatedlydescribed herein.

As shown in FIG. 4, the III-V nitride semiconductor device in the thirdembodiment is constituted so that a buffer layer 12 consisting of AlN, achannel layer 13 consisting of undoped GaN, and a carrier supply layer14 consisting of n type AlGaN are formed on a substrate 11 consisting ofSiC in this order, and so that a concave portion 14 b having a V-shapedcross section is formed in the carrier supply layer 14.

In a region on an upper surface of the carrier supply layer 14 in whichregion a gate electrode 15 is formed, a low temperature buffer layer 31consisting of silicon grown under a low temperature condition, and aprotection film 32 consisting of single-crystal silicon are formed inthis order so as to open the upper part of the concave portion 14 b. Thelow temperature buffer layer 31 is provided to relax crystal latticemismatching between the carrier supply layer 14 and the protection film32.

The gate electrode 15 is formed on the protection film 32 so as to befilled into opening portions of the low temperature buffer layer 31 andthe protection film 32 and the concave portion 14 b. A source electrode16 and a drain electrode 17 are formed in regions in which the lowtemperature buffer layer 31 and the protection film 32 are not formed onthe upper surface of the carrier supply layer 14.

In the semiconductor device in the third embodiment, since theprotection film 32 is provided on the carrier supply layer 14, a trapdensity can be reduced in both side portions of the gate electrode 15 onthe upper surface of the carrier supply layer 14. It is, therefore,possible to further ensure suppressing the frequency dispersionresulting from the traps on the upper surface of the carrier supplylayer 14, as compared with the second embodiment.

In the III-V nitride semiconductor device in the third embodiment, groupIV impurities or group V impurities such as nitrogen (N), phosphorus(P), arsenic (As), antimony (Sb), or bismuth (Bi) impurities arepreferably added to each of the low temperature buffer layer 31 and theprotection film 32. By doing so, even if gallium or aluminum isinadvertently doped into the low temperature buffer layer 31 and theprotection film 32 during crystal growth on the low temperature bufferlayer 31 and the concave portion transfer film (=protection film 32),the group IV impurities or group V impurities contained in the lowtemperature buffer layer 31 and the protection film 32 can compensatefor the inadvertently doped gallium or aluminum and the low temperaturebuffer layer 31 and the protection film 32 can be kept to have highresistance. Accordingly, even if the low temperature buffer layer 31 andthe protection film 32 are formed using silicon, a gate leak currentresulting from a reduction in specific resistance of protection film 32does not occur.

It is also preferable that an upper portion of the protection film 32 isoxidized, nitrided, or oxynitrided. By doing so, the protection film 32can be formed to have a high resistance and can be used as a low-leakageand high-reliability protection film.

Further, a material for the protection film 32 is not limited to siliconbut may be GaAs, SiC, GaP, or diamond. If one of these materials is usedas the material for the protection film 32, the material which can relaxthe lattice mismatching between the protection film 32 and the carriersupply layer 14 may be selected as the material for the low temperaturebuffer layer 31.

A method for manufacturing the III-V nitride semiconductor device in thethird embodiment of the present invention will now be described withreference to the drawings.

FIGS. 5A to 5D are cross-sectional block diagrams that depict the methodfor manufacturing the III-V nitride semiconductor device in the thirdembodiment of the present invention in order of steps. In FIGS. 5A to5D, same components as those shown in FIGS. 3A to 3D are denoted by thesame reference symbols, respectively, and will not be repeatedlydescribed herein.

As shown in FIG. 5A, the buffer layer 12 consisting of AlN, the channellayer 13 consisting of undoped GaN, the carrier supply layer 14consisting of n type AlGaN, the low temperature buffer layer 41 havingsilicon grown under the low temperature condition, and a concave portiontransfer film 42 having silicon subjected to crystal growth so that aplane orientation is a (100) plane are formed on the substrate 11 inthis order using MOCVD or MBE. A concave portion formation mask pattern23 including an opening portion 23 a a longitudinal direction of whichis a [110] orientation of the crystal lattice of silicon of the concaveportion transfer film 42 is formed on the concave portion transfer film42 by lithography.

At the crystal growth step shown in FIG. 5A, a reduction in the specificresistance of the concave portion transfer film 42 sometimesdisadvantageously occurs due to inadvertent doping of gallium oraluminum into the low temperature buffer layer 41 and the concaveportion transfer film 42. To avoid this, the low temperature bufferlayer 41 and the concave portion transfer film 42 may be formed whileadding thereto group IV impurities or group V impurities. By doing so,the group IV impurities or group V impurities can prevent the specificresistance of the concave portion transfer film 42 from being reduced bythe inadvertent doping of gallium or aluminum.

As shown in FIG. 5B, a transfer concave portion 42 a is formed in theconcave portion transfer film 42 exposed to the opening portion 23 a ofthe mask pattern 23 by wet etching using a solution mixture of potassiumhydroxide (KOH) and propyl alcohol as an etchant. As the etchant, thesolution mixture having a volume ratio of, for example, KOH:propylalcohol: H₂O=23.4:13.3:63.3 can be used.

The etchant consisting of KOH and propyl alcohol exhibits crystalanisotropy relative to silicon crystals, and an etch rate of the etchanton the (111) plane is far lower than an etch rate on the (100) plane.Therefore, the transfer concave portion 42 a is formed to have the (111)plane as an inclined surface and have a V-shaped cross section.

As shown in FIG. 5C, after removing the mask pattern 23, an entiresurface of the concave transfer film 22 is etched by dry etching using agas mixture of chlorine (Cl₂) and sulfur hexafluoride (SF₆) as anetching gas, thereby forming the concave portion 14 b in the carriersupply layer 14. A mask pattern 43 that covers a region including theconcave portion 14 b and peripheral portions of the concave portion 14 bis formed on the concave portion transfer film 22.

As shown in FIG. 5D, by sequentially removing exposed parts of theconcave portion transfer film 42 and the low temperature buffer layer 41by the etching using the mask pattern 43, the protection film 42 a isformed out of the concave portion transfer film 42. After removing themask pattern 43, the source electrode 16 and the drain electrode 17 areformed laterally of the concave portion 14 b using a metallic materialwhich can form an ohmic contact with the carrier supply layer 14, withthe distance kept between the source electrode 16 and the drainelectrode 17 and the ohmic contact is formed through a heat treatmentstep. Thereafter, the gate electrode 15 is formed to be filled into theconcave portion 14 b using a metallic material that can form a Schottkyjunction with the carrier supply layer 14.

Through these steps, the semiconductor device in the third embodimentcan be obtained.

According to the method for manufacturing the III-V nitridesemiconductor device in the third embodiment, since the protection film42A is formed out of the concave portion transfer film 42, the uppersurface of the carrier supply layer 14 is not exposed duringmanufacturing of the III-V nitride semiconductor device. A crystalinterface on the upper surface side of the carrier supply layer 14 canbe, therefore, kept in a favorable condition.

In the method for manufacturing the III-V nitride semiconductor devicein the third embodiment, after the steps of forming the gate electrode15, the source electrode 16, and the drain electrode 17, the upperportion of the protection film 42A may be, for example, oxidized ornitrided by plasma oxidation or plasma nitriding or may be oxynitridedby the plasma oxidation and the plasma nitriding. By doing so, theresistance of the protection film 42A can be increased and thereliability of the protection film 42A can be improved.

It is noted that execution of the step of oxidizing the upper portion ofthe protection film 42A is not limited to a timing after the formationof the gate electrode 15, the source electrode 16, and the drainelectrode 17 but may be after the formation of the concave portion 14 band before the step of forming the protection film 42A out of theconcave portion transfer film 42. In addition, at the step of oxidizingthe upper portion of the protection film 42A, a silicon nitride film maybe selectively formed to cover the concave portion 14 b, an entiresurface of the concave portion transfer film 42 may be thermallyoxidized, and the protection film 42A may be formed out of the thermallyoxidized concave portion transfer film 42.

Furthermore, in the method for manufacturing the III-V nitridesemiconductor device in the third embodiment, annealing can be performedunder conditions of a temperature of 300° C. or more and 1500° C. orless after the dry etching step of forming the concave portion 14 b andbefore the step of forming the protection film 42A out of the concaveportion transfer film 42. If so, crystal defects generated in thecarrier supply layer 14 can be eliminated while the carrier supply layer14 is covered with the concave portion transfer film 42. Reliability ofthe III-V nitride semiconductor device can be thereby improved.

In the method for manufacturing the III-V nitride semiconductor devicein the third embodiment, the material for the concave portion transferfilm 42 is not limited to single-crystal silicon but may be an arbitrarymaterial with which the transfer concave portion 42 a having theV-shaped cross section can be formed based on crystal anisotropy. Forexample, SiC, GaP, or diamond can be used as the material for theconcave portion transfer film 42. By using one of these materials,similarly to use of single-crystal silicon, the concave portion 14 bhaving the V-shaped cross section based on the crystal anisotropy can beformed in the concave portion transfer film 42. It is, therefore,possible to ensure forming the concave portion 14 b having the V-shapedcross section in the carrier supply layer 14. Besides, since SiC, GaP,and diamond have high heat resistance, the crystal defects on thecarrier supply layer 14 can be eliminated by the annealing whilecovering the carrier supply layer 14 with the concave portion transferfilm 42.

Embodiment 4

A III-V nitride semiconductor device in the fourth embodiment of thepresent invention will be described with reference to the drawings.

FIG. 6 is a cross-sectional block diagram of the III-V nitridesemiconductor device in the fourth embodiment of the present invention.In FIG. 6, same components as those shown in FIG. 2A are denoted by thesame reference symbols, respectively, and will not be repeatedlydescribed herein.

As shown in FIG. 6, the III-V nitride semiconductor device in the fourthembodiment is constituted so that a buffer layer 12 consisting of AlN, achannel layer 13 consisting of undoped GaN, and a carrier supply layer14 consisting of n type AlGaN are formed on a substrate 11 consisting ofSiC in this order, and so that a concave portion 14 c having asemicircular cross section is provided in the carrier supply layer 14. Agate electrode 15 is formed on the carrier supply layer 14 so as to befilled into the concave portion 14. A source electrode 16 and a drainelectrode 17 are formed laterally of the gate electrode 15 at a distancebetween the source electrode 16 and the drain electrode 17. A depth ofthe concave portion 14 c is set so that a portion of the gate electrode15 provided in the concave portion 14 c substantially functions as agate electrode, similarly to the first embodiment.

According to the III-V nitride semiconductor device in the fourthembodiment, similarly to the III-V nitride semiconductor device in thefirst embodiment, the portion of the gate electrode 15 provided in theconcave portion 14 c can be used as the substantial gate electrode. Dueto this, it is possible to decrease the influence of traps present onthe upper surface of the carrier supply layer 14, on the channel regionby as much as the depth of the concave portion 14 c. It is, therefore,possible to ensure suppressing frequency dispersion resulting from thetraps on the upper surface of the carrier supply layer 14.

Furthermore, since the concave portion 14 c is formed to have thesemicircular cross-section, an effective gate length of the gateelectrode 15 can be set small. The III-V nitride semiconductor device inthe fourth embodiment can, therefore, operate at high rate. Thecross-sectional shape of the concave portion 14 c is not limited to thesemicircular shape but may be an arbitrary shape as long as the concaveportion 14 c is formed so that an opening dimension is nonlinearlysmaller from the upper surface side of the carrier supply layer 14toward the depth direction. The cross-sectional shape of the concaveportion 14 c may be, for example, a U shape or a semielliptic shape.

A method for manufacturing the III-V nitride semiconductor device in thefourth embodiment of the present invention will now be described withreference to the drawings.

FIGS. 7A to 7D are cross-sectional block diagrams that depict the methodfor manufacturing the III-V nitride semiconductor device in the fourthembodiment of the present invention in order of steps. In FIGS. 7A to7D, same components as those shown in FIGS. 3A to 3D are denoted by thesame reference symbols, respectively, and will not be repeatedlydescribed herein.

As shown in FIG. 7A, the buffer layer 12 consisting of AlN, the channellayer 13 consisting of undoped GaN, the carrier supply layer 14consisting of n type AlGaN, and a concave portion transfer film 51consisting of amorphous or polycrystalline silicon are formed on thesubstrate 11 in this order using MOCVD or MBE. A mask pattern 23including an opening portion 23 a is formed on the concave portiontransfer film 51 by lithography.

At the step of forming the concave portion transfer film 51, the concaveportion transfer film 51 consisting of amorphous silicon may be formedby, for example, vacuum deposition or sputtering instead of the MOCVD orthe MBE.

As shown in FIG. 7B, a transfer concave portion 51 a is formed in theconcave portion transfer film 51 exposed to the opening portion 23 a ofthe mask pattern 23 by performing an isotropic on the concave portiontransfer film 51. By performing the isotropic etching on the concaveportion transfer film 51, the transfer concave portion 51 a can beformed so that the opening dimension is nonlinearly smaller from thesurface side toward the depth direction.

As shown in FIG. 7C, after removing the mask pattern 23, an entiresurface of the concave transfer film 51 is etched by a predetermineddepth by dry etching using a gas mixture of, for example, chlorine (Cl₂)and sulfur hexafluoride (SF₆) as an etching gas. As a result, thecarrier supply layer 14 is etched from the upper surface side below thetransfer concave portion 51 a, and the concave portion 14 c having thesemicircular cross section is formed in carrier supply layer 14.

As shown in FIG. 7D, after performing annealing so as to eliminate thecrystal defects generated by the dry etching, the concave portiontransfer film 51 is removed by wet etching or dry etching. Afterremoving the mask pattern 43, the source electrode 16 and the drainelectrode 17 are formed laterally of the concave portion 14 c on thecarrier supply layer 14 using a metallic material which can form anohmic contact with the carrier supply layer 14, with the distance keptbetween the source electrode 16 and the drain electrode 17, and theohmic contact is formed through a heat treatment step. Thereafter, thegate electrode 15 is formed to be filled into the concave portion 14 cusing a metallic material that can form a Schottky junction with thecarrier supply layer 14.

Through these steps, the semiconductor device in the fourth embodimentcan be obtained.

According to the method for manufacturing the III-V nitridesemiconductor device in the fourth embodiment, the transfer concaveportion 51 a is formed in the concave portion transfer film 51consisting of GaAs and the concave portion transfer film 51 is thensubjected to the dry etching, whereby the concave portion 14 c having anequivalent shape to that of the transfer concave portion 51 a can beformed in the carrier supply layer 14. Further, by using amorphoussilicon as the material for the concave portion transfer film, thecross-sectional shape of the transfer concave portion 51 a is formedinto the semicircular shape, the U shape, or the semielliptic shape. Thetransfer concave portion 51 a can be, therefore, formed so that theopening dimension is nonlinearly smaller toward the depth direction.

Further, during the etching for forming the concave portion 14 c, anetch selectivity of the material (AlGaN) for the carrier supply layer 14to the material (Si) for the concave portion transfer film 51 iscontrolled. It is thereby possible to ensure forming the concave portion14 c while controlling the shape of the concave portion 14 c based onthe shape of the transfer concave portion 51 a. It is particularlypreferable to set the etch selectivity at 1 or more.

In the method for manufacturing the III-V nitride semiconductor devicein the fourth embodiment, the annealing can be performed underconditions of a temperature of 300° C. or more and 1500° C. or lessafter the dry etching step of forming the concave portion 14 c andbefore removing the concave portion transfer film 51. If so, crystaldefects generated in the carrier supply layer 14 due to a damage of thedry etching can be eliminated. Reliability of the semiconductor devicecan be thereby improved. Besides, since the annealing is performedbefore the concave portion transfer film 51 is removed, the carriersupply layer 14 can be annealed while the carrier supply layer 14 ishardly exposed.

In the method for manufacturing the III-V nitride semiconductor devicein the fourth embodiment, the material for the concave portion transferfilm 51 is not limited to amorphous silicon but may be an arbitrarymaterial with which the concave portion 14 c can be formed by theisotropic etching so that the opening dimension is nonlinearly smallertoward the depth direction. For example, silicon oxide, silicon nitride,silicon oxynitride, silicon carbide, or III-V nitride semiconductor canbe used as the material for the concave portion transfer film 51.

Moreover, the material for the concave portion transfer film 51 is notlimited to amorphous silicon but may be a polycrystalline materialconsisting of, for example, gallium arsenide, silicon, silicon carbide,gallium phosphide, diamond, or III-V nitride semiconductor.

Embodiment 5

A III-V nitride semiconductor device in the fifth embodiment of thepresent invention will be described with reference to the drawings.

FIG. 8 is a cross-sectional block diagram of the III-V nitridesemiconductor device in the fifth embodiment of the present invention.In FIG. 8, same components as those shown in FIG. 6 are denoted by thesame reference symbols, respectively, and will not be repeatedlydescribed herein.

As shown in FIG. 8, the III-V nitride semiconductor device in the fifthembodiment is constituted so that a buffer layer 12 consisting of AlN, achannel layer 13 consisting of undoped GaN, and a carrier supply layer14 consisting of n type AlGaN are formed on a substrate 11 consisting ofSiC in this order, and so that a concave portion 14 c having asemicircular cross section is provided in the carrier supply layer 14.

In a region on an upper surface of the carrier supply layer 14 in whichregion a gate electrode 15 is formed, a protection film 61 consisting ofamorphous silicon is formed to open an upper portion of the concaveportion 14 c. The gate electrode 15 is formed on the protection film 61so as to be filled into the opening portion of the protection film 61and the concave portion 14 c. A source electrode 16 and a drainelectrode 17 are formed in regions in which the protection film 61 isnot formed on the upper surface of the carrier supply layer 14.

In the III-V nitride semiconductor device in the fifth embodiment, sincethe protection film 61 is provided on the carrier supply layer 14, atrap density can be reduced in both side portions of the gate electrode15 on the upper surface of the carrier supply layer 14. It is,therefore, possible to further ensure suppressing the frequencydispersion resulting from the traps on the upper surface of the carriersupply layer 14, as compared with the fourth embodiment.

In the III-V nitride semiconductor device in the fifth embodiment, groupIV impurities or group V impurities such as nitrogen (N), phosphorus(P), arsenic (As), antimony (Sb), or bismuth (Bi) impurities arepreferably added to the protection film 61. By doing so, even if galliumor aluminum is inadvertently doped into the protection film 61 duringcrystal growth on the protection film 61, the group IV impurities orgroup V impurities contained in the protection film 61 can compensatefor the inadvertently doped gallium or aluminum and the protection film61 can be kept to have high resistance. Accordingly, even if theprotection film 61 is formed using silicon, a gate leak currentresulting from a reduction in specific resistance of protection film 61does not occur.

It is also preferable that an upper portion of the protection film 61 isoxidized, nitrided, or oxynitrided. By doing so, the protection film 61can be formed to have a high resistance and can be used as a low-leakageand high-reliability protection film.

Further, a material for the protection film 61 is not limited toamorphous silicon but may be the other amorphous material such assilicon oxide or silicon nitride.

A method for manufacturing the III-V nitride semiconductor device in thefifth embodiment of the present invention will now be described withreference to the drawings.

FIGS. 9A to 9D are cross-sectional block diagrams that depict the methodfor manufacturing the III-V nitride semiconductor device in the fifthembodiment of the present invention in order of steps. In FIGS. 9A to9D, same components as those shown in FIGS. 7A to 7D are denoted by thesame reference symbols, respectively, and will not be repeatedlydescribed herein.

As shown in FIG. 9A, the buffer layer 12 consisting of AlN, the channellayer 13 consisting of undoped GaN, the carrier supply layer 14consisting of n type AlGaN, and a concave portion transfer film 51consisting of amorphous or polycrystalline silicon are formed on thesubstrate 11 in this order using MOCVD or MBE. A mask pattern 23including an opening portion 23 a is formed on the concave portiontransfer film 51 by lithography.

At the step of forming the concave portion transfer film 51, the concaveportion transfer film 51 consisting of amorphous silicon may be formedby, for example, vacuum deposition or sputtering instead of the MOCVD orthe MBE.

At the crystal growth step shown in FIG. 9A, a reduction in the specificresistance of the concave portion transfer film 42 sometimesdisadvantageously occurs due to inadvertent doping of gallium oraluminum into the concave portion transfer film 51. To avoid this, theconcave portion transfer film 51 may be formed while adding theretogroup IV impurities or group V impurities. By doing so, the group IVimpurities or group V impurities can prevent the specific resistance ofthe concave portion transfer film 51 from being reduced by theinadvertent doping of gallium or aluminum.

As shown in FIG. 9B, a transfer concave portion 51 a is formed in theconcave portion transfer film 51 exposed to the opening portion 23 a ofthe mask pattern 23 by performing isotropic etching on the concaveportion transfer film 51. By performing the isotropic etching on theconcave portion transfer film 51, the transfer concave portion 51 a canbe formed so that the opening dimension is nonlinearly smaller from thesurface side toward the depth direction.

As shown in FIG. 9C, after removing the mask pattern 23, an entiresurface of the concave transfer film 51 is etched by a predetermineddepth by dry etching using a gas mixture of, for example, chlorine (Cl₂)and sulfur hexafluoride (SF₆) as an etching gas, thereby forming theconcave portion 14 c having the semicircular cross section in carriersupply layer 14. A mask pattern 43 that covers a region including theconcave portion 14 c and peripheral portions of the concave portion 14 cis formed on the concave portion transfer film 51.

As shown in FIG. 9D, by removing an exposed part of the concave portiontransfer film 51 by the etching using the mask pattern 43, a protectionfilm 51A is formed out of the concave portion transfer film 51. Afterremoving the mask pattern 43, the source electrode 16 and the drainelectrode 17 are formed laterally of the concave portion 14 c on thecarrier supply layer 14 using a metallic material which can form anohmic contact with the carrier supply layer 14, with the distance keptbetween the source electrode 16 and the drain electrode 17 and the ohmiccontact is formed through a heat treatment step. Thereafter, the gateelectrode 15 is formed to be filled into the concave portion 14 c usinga metallic material that can form a Schottky junction with the carriersupply layer 14.

Through these steps, the semiconductor device in the fifth embodimentcan be obtained.

According to the method for manufacturing the III-V nitridesemiconductor device in the fifth embodiment, since the protection film51A is formed out of the concave portion transfer film 51, the uppersurface of the carrier supply layer 14 is not exposed duringmanufacturing of the III-V nitride semiconductor device. A crystalinterface on the upper surface side of the carrier supply layer 14 cankept in a favorable condition.

In the method for manufacturing the III-V nitride semiconductor devicein the fifth embodiment, after the steps of forming the gate electrode15, the source electrode 16, and the drain electrode 17, the upperportion of the protection film 51A may be, for example, oxidized ornitrided by plasma oxidation or plasma nitriding or may be oxynitridedby the plasma oxidation and the plasma nitriding. By doing so, theresistance of the protection film 51A can be increased and thereliability of the protection film 51A can be improved.

In the method for manufacturing the III-V nitride semiconductor devicein the fifth embodiment, annealing can be performed under conditions ofa temperature of 300° C. or more and 1500° C. or less after the dryetching step of forming the concave portion 14 c and before the step offorming the protection film 51A out of the concave portion transfer film51. If so, crystal defects generated in the carrier supply layer 14 canbe eliminated while the carrier supply layer 14 is covered with theconcave portion transfer film 51. Reliability of the semiconductordevice can be thereby improved.

In the method for manufacturing the III-V nitride semiconductor devicein the fifth embodiment, the material for the concave portion transferfilm 51 is not limited to amorphous silicon but may be an arbitrarymaterial with which the concave portion 14 c can be formed by theisotropic etching so that the opening dimension is nonlinearly smallertoward the depth direction. For example, silicon oxide, silicon nitride,silicon oxynitride, silicon carbide, or III-V nitride semiconductor canbe used as the material for the concave portion transfer film 51.

Moreover, the material for the concave portion transfer film 51 is notlimited to amorphous silicon but may be a polycrystalline materialconsisting of, for example, gallium arsenide, silicon, silicon carbide,gallium phosphide, diamond, or III-V nitride semiconductor.

In the III-V nitride semiconductor devices in the first embodiment tothe fifth embodiment, the material for the substrate 11 is not limitedto SiC but may be, for example, sapphire or silicon. By appropriatelyselecting the material for the buffer layer 12 according to the materialfor the substrate 11, the channel layer 13 and the carrier supply layer14 can be formed to make lattice matching relative to the substrate 11.

Furthermore, each of the III-V nitride semiconductor devices in thefirst embodiment to the fifth embodiment is constituted to function asthe HFET by providing the channel layer 13 and the carrier transferlayer 14. However, the configuration of each of the III-V nitridesemiconductor devices in the first embodiment to the fifth embodiment isnot limited to this but may be such that the channel region is formed inone semiconductor layer consisting of a III-V nitride semiconductor orin a multilayer structure consisting of a plurality of III-V nitridesemiconductor. For example, each of the III-V nitride semiconductordevices in the first embodiment to the fifth embodiment may beconstituted to function as a metal semiconductor FET (“MESFET”) byforming one channel layer consisting of n type GaN instead of thechannel layer 13 and the carrier supply layer 14.

As stated so far, the semiconductor device and the method formanufacturing the semiconductor device according to the presentinvention can advantageously reduce the frequency dispersion resultingfrom the traps between the III-V nitride semiconductor and the Schottkyelectrode and improve the high frequency characteristics of the device.Therefore, the semiconductor device and the method for manufacturing thesemiconductor device according to the present invention are useful as asemiconductor device having a Schottky electrode provided on asemiconductor layer consisting of a III-V nitride semiconductor and amethod for manufacturing the semiconductor device.

1. A semiconductor device, comprising: a III-V nitride semiconductorlayer including a channel region in which carriers travel; a concaveportion provided in an upper portion of said channel region in saidIII-V nitride semiconductor layer; and a Schottky electrode consistingof a conductive material forming a Schottky junction with thesemiconductor layer, and formed on a semiconductor layer, which spreadsover said concave portion and peripheral portions of the concaveportion, on said III-V nitride semiconductor layer, wherein a dimensionof said concave portion in a depth direction is set so that a portion ofsaid Schottky electrode provided in said concave portion can adjust aquantity of the carriers traveling in said channel region.
 2. Thesemiconductor device of claim 1, further comprising a film providedbetween said III-V nitride semiconductor layer and said Schottkyelectrode so as to open an upper side of said concave portion.
 3. Thesemiconductor device of claim 1, wherein said concave portion isprovided so that an opening dimension is smaller from an upper surfaceside of said III-V nitride semiconductor layer toward a bottom side ofsaid III-V nitride semiconductor layer.
 4. The semiconductor device ofclaim 3, wherein said concave portion is provided so that said openingdimension is linearly changed.
 5. The semiconductor device of claim 4,further comprising a film consisting of a crystalline material andprovided between said III-V nitride semiconductor layer and saidSchottky electrode so as to open an upper side of said concave portion.6. The semiconductor device of claim 3, wherein said concave portion isprovided so that said opening dimension is nonlinearly changed.
 7. Thesemiconductor device of claim 6, further comprising a film consisting ofan amorphous material and provided between said III-V nitridesemiconductor layer and said Schottky electrode so as to open an upperside of said concave portion.
 8. A method for manufacturing asemiconductor device comprising steps of: sequentially forming a III-Vnitride semiconductor layer and a concave portion transfer film on asubstrate; forming a first concave portion in said concave portiontransfer film; and etching said concave portion transfer film by apredetermined depth using etching capable of etching said III-V nitridesemiconductor layer and said concave portion transfer film, and therebyforming a second concave portion that has an equivalent shape to a shapeof said first concave portion, below said first concave portion in saidIII-V nitride semiconductor layer.
 9. The method for manufacturing asemiconductor device of claim 8, wherein said concave portion transferfilm consists of a crystalline material, and the step of forming saidfirst concave portion includes steps of: forming a first mask patternthat includes an opening portion in a region in which said first concaveportion is formed, on said concave portion transfer film; and removing apart of said concave portion transfer film which part is exposed to saidopening portion of said first mask pattern by a predetermined depth byanisotropic etching.
 10. The method for manufacturing a semiconductordevice of claim 9, wherein said crystalline material is one of galliumarsenide, silicon, silicon carbide, gallium phosphide, and diamond. 11.The method for manufacturing a semiconductor device of claim 9, whereinsaid concave portion transfer film contains impurities consisting of agroup IV element or a group V element.
 12. The method for manufacturinga semiconductor device of claim 9, further comprising a step, after thestep of forming said second concave portion, of conducting a heattreatment to said III-V nitride semiconductor layer under conditions ofa temperature of 300° C. or more and 1500° C. or less.
 13. The methodfor manufacturing a semiconductor device of claim 9, wherein at the stepof forming said second concave portion, an etching depth of the etchingon said concave portion transfer film is set so that said concaveportion transfer film remains on an upper surface of said III-V nitridesemiconductor layer, and the method further comprises steps of: forminga second mask pattern that covers said second concave portion andperipheral portions of the second concave portion, on said concaveportion transfer film after the step of forming said second concaveportion; and forming a film that covers the peripheral portions of thesecond concave portion from said concave portion transfer film byetching using said second mask pattern.
 14. The method for manufacturinga semiconductor device of claim 13, further comprising a step, betweenthe step of forming said second concave portion and the step of formingsaid film, of conducting a heat treatment to said III-V nitridesemiconductor layer at a temperature of 300° C. or more and 1500° C. orless.
 15. The method for manufacturing a semiconductor device of claim13, wherein said crystalline material that constitutes said concaveportion transfer film is one of silicon, silicon carbide, galliumphosphide, and diamond.
 16. The method for manufacturing a semiconductordevice of claim 13, further comprising a step, after the step of formingsaid second concave portion, of oxidizing, nitriding, or oxynitriding asurface of said concave portion transfer film.
 17. The method formanufacturing a semiconductor device of claim 8, wherein said concaveportion transfer film consists of an amorphous material, and the step offorming said first concave portion includes steps of: forming a firstmask pattern that includes an opening portion in a region in which saidfirst concave portion is formed, on said concave portion transfer film;and removing a part of said concave portion transfer film which part isexposed to the opening portion of said first mask pattern by apredetermined depth by isotropic etching.
 18. The method formanufacturing a semiconductor device of claim 17, wherein said amorphousmaterial is one of amorphous silicon, silicon oxide, silicon nitride,silicon carbide, and a III-V nitride semiconductor.
 19. The method formanufacturing a semiconductor device of claim 17, wherein said concaveportion transfer film contains impurities consisting of a group IVelement or a group V element.
 20. The method for manufacturing asemiconductor device of claim 17, wherein at the step of forming saidsecond concave portion, an etching depth of the etching on said concaveportion transfer film is set so that said concave portion transfer filmremains on an upper surface of said III-V nitride semiconductor layer,and the method further comprises steps of: forming a second mask patternthat covers said second concave portion and peripheral portions of thesecond concave portion, on said concave portion transfer film after thestep of forming said second concave portion; and forming a film thatcovers the peripheral portions of the second concave portion from saidconcave portion transfer film by etching using said second mask pattern.21. The method for manufacturing a semiconductor device of claim 20,further comprising a step, between the step of forming said secondconcave portion and the step of forming said film, of conducting a heattreatment to said III-V nitride semiconductor layer at a temperature of300° C. or more and 1500° C. or less.
 22. The method for manufacturing asemiconductor device of claim 20, further comprising a step, after thestep of forming said second concave portion, of oxidizing, nitriding, oroxynitriding a surface of said concave portion transfer film.
 23. Themethod for manufacturing a semiconductor device of claim 8, wherein saidconcave portion transfer film consists of a polycrystalline material,and the step of forming said first concave portion includes steps of:forming a first mask pattern that includes an opening portion in aregion in which said first concave portion is formed, on said concaveportion transfer film; and removing a part of said concave portiontransfer film which part is exposed to the opening portion of said firstmask pattern by a predetermined depth by isotropic etching.
 24. Themethod for manufacturing a semiconductor device of claim 23, whereinsaid polycrystalline material is one of gallium arsenide, silicon,silicon carbide, gallium phosphide, diamond, and a III-V nitridesemiconductor.
 25. The method for manufacturing a semiconductor deviceof claim 23, wherein said concave portion transfer film containsimpurities consisting of a group IV element or a group V element. 26.The method for manufacturing a semiconductor device of claim 23, whereinat the step of forming said second concave portion, an etching depth ofthe etching on said concave portion transfer film is set so that saidconcave portion transfer film remains on an upper surface of said III-Vnitride semiconductor layer, and the method further comprises steps of:forming a second mask pattern that covers said second concave portionand peripheral portions of the second concave portion, on said concaveportion transfer film after the step of forming said second concaveportion; and forming a film that covers the peripheral portions of thesecond concave portion from said concave portion transfer film byetching using said second mask pattern.
 27. The method for manufacturinga semiconductor device of claim 26, further comprising a step, betweenthe step of forming said second concave portion and the step of formingsaid film, of conducting a heat treatment to said III-V nitridesemiconductor layer at a temperature of 300° C. or more and 1500° C. orless.
 28. The method for manufacturing a semiconductor device of claim26, further comprising a step, after the step of forming said secondconcave portion, of oxidizing, nitriding, or oxynitriding a surface ofsaid concave portion transfer film.